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Operation
2.5.3
I/O Port Trace Connections
Streaming parallel trace is possible using a device 8-pin I/O port and the emulator logic
probe connector. This provides greater trace speed and data quantity, but limits
emulator-to-target distance by the length of the logic probe connectors. Figure 2-11
shows these additional connections.
FIGURE 2-11:
PARALLEL TRACE CONNECTIONS
Application
Emulator Pod
PC Board
Interface
Connector
5
7
6:0
7
Device
PORTx
Probe
10K Ω
Connector
For this trace configuration, seven (7) lines of data and one (1) line for clock are
transmitted. PORTx must be a port with 8 pins that has all 8 pins available for trace.
The port must not be multiplexed with the currently-used PGC and PGM pins.
A basic configuration is shown in Table 2-1: “I/O Port Trace Connection Example” .
TABLE 2-1:
I/O PORT TRACE CONNECTION EXAMPLE
PORTx pin
0
1
2
3
4
5
6
Logic Probe pin (1)
EXT0
EXT1
EXT2
EXT3
EXT4
EXT5
EXT6
Content
Data
Data
Data
Data
Data
Data
Data
7
EXT7
(2)
Clock
Note 1:
2:
For pin descriptions, see Section 12.5.4 “Logic Probe/External Trigger Inter-
face” .
Use a 10K Ω pull-down resistor.
As in Section 2.4.4 “Circuits That Will Prevent the Emulator From Functioning” ,
do not use pull-up resistors, capacitors or diodes on port pins, except as specified.
For more on this type of trace, see Section 7.3.3.2 “I/O Port Trace” .
? 2008 Microchip Technology Inc.
DS51616B-page 21
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